A phase-changeable memory device is a nonvolatile memory device that works by exploiting a resistance difference that occurs in response to a phase change of a phase-changeable material. In such a phase-changeable memory device, a unit cell includes one switching device and a phase-changeable resistor electrically connected to the switching device. The phase-changeable resistor includes an upper electrode, a lower electrode, and a phase-changeable material layer disposed between the upper and lower electrodes.
The switching device may be a metal-oxide-semiconductor (MOS) transistor. In this case, programming of the unit cell of the phase-changeable memory device requires a high program current of at least several mA. This limits a reduction in an area of the MOS transistor, which conducts the program current. In other words, the use of the MOS transistor as the switching device restricts the integration density of the phase-changeable memory device.
To solve this problem, a vertical diode may be used as the cell-switching device instead of the MOS transistor. A phase-change memory device with a vertical diode is disclosed by Chen et al. in U.S. Patent Publication No. 2004/0036103, entitled “Memory Device and Method of Manufacturing the Same.” Chen et al. describes a device in which an n-type doping layer is formed on a p-type semiconductor substrate, an insulating layer is formed on the n-type doping layer, a plug is formed in the insulating layer, an n-type dopant is doped in the entire region of the plug, the upper portion of the plug, which is doped with an n-type dopant, is doped with a p-type dopant, and a phase-changeable resistor is formed on the plug.
In such a phase-changeable memory device, a parasitic bipolar junction transistor may be created between adjacent cells. In particular, a p-type doping layer that is an upper region of the plug, an n-type doping layer that is a lower region of the plug, an n-type doping layer on the substrate, an n-type doping layer that is a lower region of an adjacent plug, and a p-type doping layer that is an upper region of the adjacent plug may form a p-n-p-type bipolar junction transistor. The transistor may cause electrical disturbance between adjacent cells when the phase-changeable memory device is active.